floating point unit

In dynamic binary translation system , floating point unit is an important component to translate and execute floating point instructions .

在动态二进制翻译系统中，浮点运算单元是用来翻译和执行浮点运算指令的一个重要组成部分。

Experiments show that the hybrid floating point unit combines the advantages of the two floating point units , with superior performance .

实验表明，混合式浮点运算单元综合了两种浮点运算单元的优点，具有优越的性能。

Tests and verifies the floating point unit in direct and random methods , with 100 % functional coverage and code coverage .

采用直接和随机测试方法，对浮点运算单元进行了测试和验证，代码覆盖率和功能覆盖率都达到了100%。

Second , the simulation-verification methods based on reference model and machine are talked about the validity and compatibility of the high performance CPU design . Furthermore , these have been applied to the verification of floating point unit .

探讨了基于参考模型和基于参考机型的模拟验证方法对高性能CPU部件设计的正确性和兼容性验证的有效性，并应用于具体的浮点部件的验证过程。

This paper presents the principal features of Intel 's Pentium Architecture . It includes the description of basic blocks , pipeline structure , instruction pairing rule , floating point unit , on-chip caches and TLBs and the cache consistency protocol for supporting multiprocessing systems .

本文介绍Intel最新产品Pentium体系结构的主要特点，包括它的部件组成、流水线结构、指令配对法则、浮点部件、片上cache与TLB以及支持多机系统的cache一致性协议。

Computer principle of a floating point arithmetic unit .

计算机组成原理的一个浮点数运算器。

SP3.1 Perform verification on the selected work products . FEU Floating point Execution Unit . This performs floating point related calculations for both existing scalar instructions along with support for some of the new SIMD-FP instructions .

对指定的工作产品进行验证。如：执行单元测试、成测试、统测试等。FEU浮点执行单元。与支持SIMDFP指令的现有规模指令一起执行浮点相关的计算。

The Circuit Design of Floating - Point Square Root Unit

浮点开方运算单元的电路设计

This paper studies how does CrossBit utilize these two floating point units , and then construct a more efficient hybrid floating point unit , so as to enhance the performance of CrossBit .

本文研究如何在CrossBit中综合利用这两个浮点运算单元，构造一个更高效的混合式的浮点运算单元，从而提高CrossBit浮点运算单元的执行性能。